/*
 * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
 * Copyright 2016-2017 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include <stdio.h>

#include "fsl_common.h"
#include "board.h"

#include "fsl_gpio.h"

#include "spi_comm.h"


/*******************************************************************************
 * Definitions
 ******************************************************************************/


/*******************************************************************************
 * Prototypes
 ******************************************************************************/
void app_spi_cs_pins_init(void);
void app_spi_cs_pins_output_0(uint32_t pins);
void app_spi_cs_pins_output_1(uint32_t pins);

void app_spi_master_xfer_done_callback(void *param);

 /*******************************************************************************
 * Variables.
 ******************************************************************************/
#define APP_SPI_XFER_BUFF_LEN  16u
uint8_t app_spi_xfer_buff[APP_SPI_XFER_BUFF_LEN];

spi_master_xfer_handler_t app_spi_master_xfer_handler_struct;

#define APP_SPI_CS_PIN_NUM 2u
const uint32_t app_spi_cs_pin[APP_SPI_CS_PIN_NUM] = { 11, 12 };



/*******************************************************************************
 * Code
 ******************************************************************************/
/*!
 * @brief Main function
 */
int main(void)
{
    board_init();
    printf("spi master int.\r\n");

    app_spi_cs_pins_init();

    spi_init_master(SPI0);
    spi_conf_master(SPI0, eSPI_Speed_58k, eSPI_CpolCpha_00, eSPI_BitOrder_MSB);

    for (uint32_t i = 0u; i < APP_SPI_XFER_BUFF_LEN; i++)
    {
        app_spi_xfer_buff[i] = i;
    }

    while (1)
    {
        getchar();
        printf("one spi frame.\r\n");

        app_spi_cs_pins_output_0( (1u << 0u) | (1u << 1u) );

        for (uint32_t i = 0u; i < APP_SPI_XFER_BUFF_LEN; i++)
        {
            app_spi_xfer_buff[i] = i;
        }

        app_spi_master_xfer_handler_struct.buff_len = APP_SPI_XFER_BUFF_LEN;
        app_spi_master_xfer_handler_struct.tx_buff = app_spi_xfer_buff;
        app_spi_master_xfer_handler_struct.rx_buff = app_spi_xfer_buff;
        app_spi_master_xfer_handler_struct.cs_mask = (1u << 0u) | (1u << 1u);
        app_spi_master_xfer_handler_struct.xfer_done_callback = app_spi_master_xfer_done_callback;

        spi_master_start_xfer(SPI0, &app_spi_master_xfer_handler_struct);
    }
}

/* hardware entry for spi0 isr. */
void SPI0_IRQHandler(void)
{
    spi_master_isr_hook(SPI0, &app_spi_master_xfer_handler_struct);
}

void app_spi_cs_pins_init(void)
{
    CLOCK_EnableClock(kCLOCK_Gpio0);

    gpio_pin_config_t pin_config;
    pin_config.outputLogic = 1u;
    pin_config.pinDirection = kGPIO_DigitalOutput;
    for (uint32_t i = 0u; i < APP_SPI_CS_PIN_NUM; i++)
    {
        GPIO_PinInit(GPIO, 0u, app_spi_cs_pin[i], &pin_config);
    }
}

void app_spi_cs_pins_output_1(uint32_t pins)
{
    for (uint32_t i = 0u; i < APP_SPI_CS_PIN_NUM; i++)
    {
        if ( 0u != ( pins & (1u << i) ) )
        {
            GPIO_PinWrite(GPIO, 0u, app_spi_cs_pin[i], 1u);
        }
    }
}

void app_spi_cs_pins_output_0(uint32_t pins)
{
    for (uint32_t i = 0u; i < APP_SPI_CS_PIN_NUM; i++)
    {
        if ( 0u != ( pins & (1u << i) ) )
        {
            GPIO_PinWrite(GPIO, 0u, app_spi_cs_pin[i], 0u);
        }
    }
}

void app_spi_master_xfer_done_callback(void *param)
{
    spi_master_xfer_handler_t * xfer_handler = (spi_master_xfer_handler_t *)param;
    app_spi_cs_pins_output_1(xfer_handler->cs_mask);
}

/* EOF. */

